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EL5178, EL5378
Data Sheet May 16, 2007 FN7491.3
700MHz Differential Twisted-Pair Drivers
The EL5178 and EL5378 are single and triple high bandwidth amplifiers with an output in differential form. They are primarily targeted for applications such as driving twisted-pair lines in component video applications. The inputs can be in either single-ended or differential form but the outputs are always in differential form. On the EL5178 and EL5378, two feedback inputs provide the user with the ability to set the gain of each device (stable at minimum gain of 2). The output common mode level for each channel is set by the associated REF pin, which have a -3dB bandwidth of over 110MHz. Generally, these pins are grounded but can be tied to any voltage reference. All outputs are short circuit protected to withstand temporary overload condition. The EL5178 is available in 8 Ld MSOP and SOIC packages and EL5378 is available in a 28 Ld QSOP package. All are specified for operation over the full -40C to +85C temperature range.
Features
* Fully differential inputs, outputs, and feedback * Differential input range 2.3V * 700MHz 3dB bandwidth * 1000V/s slew rate * Low distortion at 5MHz and 20MHz * Single 5V or dual 5V supplies * 60mA maximum output current * Low power - 12.5mA per channel * Pb-Free plus anneal available (RoHS compliant)
Applications
* Twisted-pair driver * Differential line driver * VGA over twisted-pair * ADSL/HDSL driver * Single ended to differential amplification * Transmission of analog signals in a noisy environment
Pinouts
EL5178 (8 LD MSOP, SOIC) TOP VIEW
FBP 1 IN+ 2 REF 3 FBN 4 + 8 OUT+ 7 VS6 VS+ 5 OUTNC 1 INP1 2 INN1 3 REF1 4 NC 5 INP2 6 INN2 7 REF2 8 NC 9 INP3 10 INN3 11 REF3 12 NC 13 EN 14 + + + -
EL5378 (28 LD QSOP) TOP VIEW
28 OUT1 27 FBP1 26 FBN1 25 OUT1B 24 VSP 23 VSN 22 OUT2 21 FBP2 20 FBN2 19 OUT2B 18 OUT3 17 FBP3 16 FBN3 15 OUT3B
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
EL5178, EL5378 Ordering Information
PART NUMBER EL5178IS EL5178IS-T7 EL5178IS-T13 EL5178ISZ (Note) EL5178ISZ-T7 (Note) EL5178ISZ-T13 (Note) EL5178IY EL5178IY-T7 EL5178IY-T13 EL5178IYZ (Note) EL5178IYZ-T7 (Note) EL5178IYZ-T13 (Note) EL5378IU EL5378IU-T7 EL5378IU-T13 EL5378IUZ (Note) EL5378IUZ-T7 (Note) EL5378IUZ-T13 (Note) PART MARKING 5178IS 5178IS 5178IS 5178ISZ 5178ISZ 5178ISZ BBGAA BBGAA BBGAA BBHAA BBHAA BBHAA EL5378IU EL5378IU EL5378IU EL5378IUZ EL5378IUZ EL5378IUZ TAPE & REEL 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" 7" 13" PACKAGE 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) 8 Ld SOIC (150 mil) (Pb-Free) 8 Ld SOIC (150 mil) (Pb-Free) 8 Ld SOIC (150 mil) (Pb-Free) 8 Ld MSOP (3.0mm) 8 Ld MSOP (3.0mm) 8 Ld MSOP (3.0mm) 8 Ld MSOP (3.0mm) (Pb-Free) 8 Ld MSOP (3.0mm) (Pb-Free) 8 Ld MSOP (3.0mm) (Pb-Free) 28 Ld QSOP (150 mil) 28 Ld QSOP (150 mil) 28 Ld QSOP (150 mil) 28 Ld QSOP (150 mil) (Pb-Free) 28 Ld QSOP (150 mil) (Pb-Free) 28 Ld QSOP (150 mil) (Pb-Free) PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0027 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0043 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040 MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FN7491.3 May 16, 2007
EL5178, EL5378
Absolute Maximum Ratings (TA = +25C)
Supply Voltage (VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA Input Current (all inputs and references) . . . . . . . . . . . . . . . . . . 4mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Information
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW -3dB Bandwidth
VS+ = +5V, VS- = -5V, TA = +25C, VIN = 0V, RLD = 1k, CLD = 2.7pF, [RF = 604, RG = 402 (EL5178)], [RF = 402, RG = 274 (EL5378)], unless otherwise specified. DESCRIPTION CONDITIONS MIN TYP MAX UNIT
AV = 2, CLD = 2.7pF AV = 5, CLD = 2.7pF AV = 2, CLD = 2.7pF, RLD = 200
700 80 320 45 650 650 850 1000 35 20 350
MHz MHz MHz MHz V/s V/s ns ns MHz MHz V/s V/s nV/Hz pA/Hz dBc dBc dBc dBc % dB
BW SR
0.1dB Bandwidth Slew Rate, Differential (EL5178) Slew Rate, Differential (EL5378)
AV = 2, CLD = 2.7pF VOUT = 3VP-P, 20% to 80% VOUT = 3VP-P, 20% to 80% VOUT = 2VP-P AV = 2
TSTL TOVR GBWP VREFBW (-3dB) VREFSR+ VREFSRVN IN HD2
Settling Time to 0.1% Output Overdrive Recovery Time Gain Bandwidth Product VREF -3dB Bandwidth (EL5378) VREF Slew Rate - Rise (EL5378) VREF Slew Rate - Fall (EL5378) Input Voltage Noise Input Current Noise Second Harmonic Distortion
CLD = 2.7pF VOUT = 2VP-P, 20% to 80% VOUT = 2VP-P, 20% to 80% at 10kHz at 10kHz VOUT = 2VP-P, 5MHz VOUT = 2VP-P, 20MHz
110 134 70 18 1.5 -83 -72 -88 -70 0.06 0.13 90
HD3
Third Harmonic Distortion
VOUT = 2VP-P, 5MHz VOUT = 2VP-P, 20MHz
dG d eS
Differential Gain at 3.58MHz Differential Phase at 3.58MHz Channel Separation (EL5378)
RLD = 300, AV =2 RLD = 300, AV =2 at F = 1MHz
INPUT CHARACTERISTICS VOS IIN IREF RIN CIN DMIR Input Referred Offset Voltage Input Bias Current (VIN+, VIN-) Input Bias Current (VREF) (EL5378) Differential Input Resistance Differential Input Capacitance Differential Mode Input Range (EL5378) VREF = 3.0V -20 0.05 1.9 -14 2.3 150 1 2.3 30 -7 4 mV A A k pF V
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FN7491.3 May 16, 2007
EL5178, EL5378
Electrical Specifications
PARAMETER CMIR+ CMIRVREFIN + VREFIN VREFOS CMRR VS+ = +5V, VS- = -5V, TA = +25C, VIN = 0V, RLD = 1k, CLD = 2.7pF, [RF = 604, RG = 402 (EL5178)], [RF = 402, RG = 274 (EL5378)], unless otherwise specified. (Continued) DESCRIPTION Common Mode Positive Input Range at VIN+, VIN- (EL5378) Common Mode Negative Input Range at VIN+, VIN- (EL5378) Positive Reference Input Voltage Range (EL5378) Negative Reference Input Voltage Range (EL5378) Output Offset Relative to VREF (EL5378) Input Common Mode Rejection Ratio VIN = 2.5V 65 VIN+ = VIN- = 0V VIN+ = VIN- = 0V 3.2 CONDITIONS MIN 3.1 TYP 3.4 -4.4 3.7 -3.3 50 78 -3.2 100 -4.1 MAX UNIT V V V V mV dB
OUTPUT CHARACTERISTICS VOUT IOUT(Max) ROUT SUPPLY VSUPPLY IS(ON) IS(OFF)+ IS(OFF)PSRR Supply Operating Range Power Supply Current - Per Channel Positive Power Supply Current - Disabled (EL5378) Negative Power Supply Current - Disabled (EL5378) Power Supply Rejection Ratio VS from 4.5V to 5.5V EN pin tied to 4.8V -200 60 VS+ to VS4.75 10 12.5 1.7 -120 75 11 14 10 V mA A A dB Output Voltage Swing Maximum Output Current Output Impedance RL = 1k RL = 10, VIN+ = 3.2V 3.4 50 3.7 60 130 100 V mA m
ENABLE (EL5378 ONLY) tEN tDS VIH VIL IIH-EN IIL-EN Enable Time Disable Time EN Pin Voltage for Power-Up EN Pin Voltage for Shut-Down EN Pin Input Current High EN Pin Input Current Low At VEN = 5V At VEN = 0V -20 VS+ -0.5 123 -8 200 130 1.2 VS+ -1.5 ns s V V A A
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FN7491.3 May 16, 2007
EL5178, EL5378 Pin Descriptions
EL5178 1 2 3 4 5 6 7 8 EL5378 17, 21, 27 2, 6, 10 3, 7, 11 16, 20, 26 15, 19, 25 24 23 18, 22, 28 1, 5, 9, 13 4, 8, 12 14 PIN NAME FBP1, 2, 3 INP1, 2, 3 INN1, 2, 3 FBN1, 2, 3 OUT1B, 2B, 3B VSP VSN OUT1, 2, 3 NC REF1, 2, 3 EN PIN FUNCTION Feedback from non-inverting outputs Non-inverting inputs Inverting inputs, note that on EL5178, this pin is also the REF pin Feedback from inverting outputs Inverting outputs Positive supply Negative supply Non-inverting outputs No connect; grounded for best crosstalk performance Reference inputs, sets common-mode output voltage ENABLE
Typical Performance Curves
20 VS=5V RLD=1k CLD=0pF AV=2 RF=2k RF=1k GAIN (dB) VS=5V 15 RLD=1k CLD=0pF RF=422 10 5 0 -5 -10 -15 100K AV=5 AV=2
RF=422
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 1. EL5178 FREQUENCY RESPONSE FOR VARIOUS RF
FIGURE 2. EL5178 FREQUENCY RESPONSE FOR VARIOUS GAIN
VS=5V RLD=200 RF=422 AV=2
CLD=22pF CLD=12pF
CLD=5.6pF CLD=0pF
FIGURE 3. EL5178 FREQUENCY RESPONSE FOR VARIOUS CLD
FIGURE 4. EL5178 FREQUENCY RESPONSE FOR VARIOUS RLD
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FN7491.3 May 16, 2007
EL5178, EL5378 Typical Performance Curves
(Continued)
FIGURE 5. EL5178 FREQUENCY RESPONSE FOR VARIOUS VOPP
20 VS=5V 15 RLD=1k CLD=0pF RF=422 10 GAIN (dB) 5 0 -5 -10 -15 100K AV=5 AV=2
FIGURE 6. EL5378 FREQUENCY RESPONSE FOR VARIOUS RF
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 7. EL5378 FREQUENCY RESPONSE FOR VARIOUS GAIN
FIGURE 8. EL5378 FREQUENCY RESPONSE FOR VARIOUS CLD
VS=5V CLD=0pF RF=422 AV=2
RLD=1k
RLD=200
FIGURE 9. EL5378 FREQUENCY RESPONSE FOR VARIOUS RLD
FIGURE 10. VOLTAGE AND CURRENT NOISE vs FREQUENCY
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FN7491.3 May 16, 2007
EL5178, EL5378 Typical Performance Curves
(Continued)
FIGURE 11. CMRR vs FREQUENCY
100
FIGURE 12. DIFFERENTIAL PSRR vs FREQUENCY
IMPEDANCE ()
10
1
0.1 10K
100K
1M FREQUENCY (Hz)
10M
100M
FIGURE 13. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 14. OUTPUT IMPEDANCE [DISABLED]
INPUT TO OUTPUT DELAY (ns)
VS=5V RF=422 AV=+2 tdFALL
tdRISE
VIN-PP (V)
FIGURE 15. CHANNEL SEPARATION vs FREQUENCY
FIGURE 16. INPUT TO OUTPUT DELAY
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FN7491.3 May 16, 2007
EL5178, EL5378 Typical Performance Curves
VS=5V RLD=1k RF=422 AV=2
(Continued)
F=40MHz
VS=5V RLD=1k CLD=0pF RF=422 6VOPP-DM
F=20MHz 4VOPP-DM 2VOPP-DM F=5MHz F=2.2MHz
F=10MHz
FIGURE 17. TOTAL HARMONIC DISTORTION vs DIFFERENTIAL OUTPUT SWING
FIGURE 18. TOTAL HARMONIC DISTORTION vs FREQUENCY
VIN 200mV/DIV VOUT 1V/DIV
VIN
VOUT
5ns/DIV
10ns/DIV
FIGURE 19. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 20. LARGE SIGNAL TRANSIENT RESPONSE
2V/DIV
VOUT
VOUT 2V/DIV
EN 4V/DIV 4V/DIV
EN
100ns/DIV
400ns/DIV
FIGURE 21. EL5378 ENABLED RESPONSE
FIGURE 22. EL5378 DISABLED RESPONSE
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FN7491.3 May 16, 2007
EL5178, EL5378 Typical Performance Curves
(Continued)
VS=5V RL=50
VS=5V RL=50 f1 f2
2f2-f1
2f1-f2
FIGURE 23. IP3 vs FREQUENCY
FIGURE 24. THIRD ORDER INTERCEPT POINT
+/- SUPPLY CURRENT (mA)
+VOUT
+IS
-VOUT
-IS
TEMPERATURE (C)
FIGURE 25. OUTPUT SWING vs TEMPERATURE
FIGURE 26. +/- SUPPLY CURRENT vs TEMPERATURE
VS=5.5V
FIGURE 27. OFFSET VOLTAGE vs TEMPERATURE
FIGURE 28. INPUT BIAS CURRENT vs TEMPERATURE
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FN7491.3 May 16, 2007
EL5178, EL5378 Typical Performance Curves
(Continued)
VOUT=3Vpp POWER DISSIPATION (W)
1.4
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.2 1.263W 1 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (C) MSOP8 JA=206C/W 781mW 607mW SO8 JA=160C/W QSOP28 JA=99C/W
FIGURE 29. SLEW RATE vs TEMPERATURE
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
1.8 1.6 POWER DISSIPATION (W) 1.4
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.583W QSOP28 JA=79C/W SO8 JA=110C/W
1.2 1.136W 1 1.087W 0.8 0.6 0.4 0.2 0 0 25 50
MSOP8 JA=115C/W
75 85 100
125
150
AMBIENT TEMPERATURE (C)
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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FN7491.3 May 16, 2007
Connection Diagrams
EL5178
RF1 422 1 FBP IN+ REF RS2 50 RS2 50 RG 845 2 INP 3 REF 4 FBN OUT 8 VSN 7 VSP 6 OUTB 5 RF2 422 +5V CL2 5pF RLD 1k OUTB -5V OUT CL1 5pF
11
INP1 INN1 REF1 INP2 INN2 REF2 INP3 INN3 REF3 RSP1 50 RSN1 50 RSR1 50 RSP2 50 RSN2 50 RSR2 50 RSP3 50
FN7491.3 May 16, 2007
EL5378
+5V
EL5178, EL5378
1 NC 2 INP1 3 INN1 4 REF1 5 NC 6 INP2 7 INN2 8 REF2 9 NC 10 INP3 11 INN3 RSN3 50 RSR3 50 12 REF3 13 NC 14 EN ENABLE
OUT1 28 FBP1 27 FBN1 26 OUT1B 25 VSP 24 VSN 23 OUT2 22 FBP2 21 FBN2 20 OUT2B 19 OUT3 18 FBP3 17 FBN3 16 OUT3B 15 -5V RF RG 845 RF 422 RLD3 1k CL1 5pF CL1B 5pF CL2 5pF CL2B 5pF CL3 5pF CL3B 5pF RF RG 845 RF 422 RLD2 1k RF RG 845 RF 422 RLD1 1k 422
422
422
EL5178, EL5378 Simplified Schematic
VS+ R3 R1 R2 R7 R8 R4
IN+
IN-
FBP
FBN
VB1
OUT+ RCD REF RCD R9 R10
CC
VB2 CC R5 VSR6
OUT-
Description of Operation and Application Information
Product Description
The EL5178 and EL5378 are wide bandwidth, low power and single/differential ended to differential output amplifiers. The EL5178 is a single channel differential amplifier. Since the IN- pin and REF pin are tired together internally, the EL5178 can be used as a single ended to differential converter. The EL5378 is a triple channel differential amplifier. The EL5378 have a separate IN- pin and REF pin for each channel. It can be used as single/differential ended to differential converter. The EL5178 and EL5378 are internally compensated for closed loop gain of 1 of greater. Connected in gain of 2 and driving a 1k differential load, the EL5178 and EL5378 have a -3dB bandwidth of 700MHz. Driving a 200 differential load at gain of 2, the bandwidth is about 320MHz. The EL5378 is available with a power down feature to reduce the power while the amplifier is disabled.
Differential and Common Mode Gain Settings
For EL5178, since the IN- pin and REF pin are bounded together as the REF pin in an 8 Ld package, the signal at the REF pin is part of the common mode signal and also part of the differential mode signal. For the true balance differential outputs, the REF pin must be tired to the same bias level as the IN+ pin. For a 5V supply, just tire the REF pin to GND if the IN+ pin is biased at 0V with a 50 or 75 termination resistor. For a single supply application, if the IN+ is biased to half of the rail, the REF pin should be biased to half of the rail also. The gain setting for EL5178 is:
R F1 + R F2 V ODM = V IN + x 1 + --------------------------- RG 2R F V ODM = V IN + x 1 + ---------- RG V OCM = V REF = 0V
Input, Output, and Supply Voltage Range
The EL5178 and EL5378 have been designed to operate with a single supply voltage of 5V to 10V or a split supplies with its total voltage from 5V to 10V. The amplifiers have an input common mode voltage range from -4.3V to 3.4V for 5V supply. The differential mode input range (DMIR) between the two inputs is from -2.3V to +2.3V. The input voltage range at the REF pin is from -3.3V to 3.7V. If the input common mode or differential mode signal is outside the above-specified ranges, it will cause the output signal distorted. The output of the EL5178 and EL5378 can swing from -3.8V to +3.8V at 1k differential load at 5V supply. As the load resistance becomes lower, the output swing is reduced.
Where: VREF = 0V RF1 = RF2 = RF EL5378 have a separate IN- pin and REF pin. It can be used as a single/differential ended to differential converter. The voltage applied at REF pin can set the output common mode voltage and the gain is one.
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EL5178, EL5378
The gain setting for EL5378 is:
R F1 + R F2 V ODM = ( V IN + - V IN - ) x 1 + --------------------------- RG 2R F V ODM = ( V IN + - V IN - ) x 1 + ---------- RG V OCM = V REF
Driving Capacitive Loads and Cables
The EL5178 and EL5378 can drive 23pF differential capacitor in parallel with 200 differential load with less than 5dB of peaking at gain of 2. If less peaking is desired in applications, a small series resistor (usually between 5 to 50) can be placed in series with each output to eliminate most peaking. However, this will reduce the gain slightly. If the gain setting is greater than 2, the gain resistor RG can then be chosen to make up for any gain loss which may be created by the additional series resistor at the output. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, a back-termination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a back-termination resistor. Again, a small series resistor at the output can help to reduce peaking.
Where: RF1 = RF2 = RF
RF1
FBP VIN+ VINVREF RG INREF FBN RF2 V OIN+ V O+
Disable/Power-Down (for EL5378 only)
The EL5378 can be disabled and placed its outputs in a high impedance state. The turn off time is about 1.2s and the turn on time is about 130ns. When disabled, the amplifier's supply current is reduced to 1.7A for IS+ and 120A for IStypically, thereby effectively eliminating the power consumption. The amplifier's power down can be controlled by standard CMOS signal levels at the EN pin. The applied logic signal is relative to VS+ pin. Letting the EN pin float or applying a signal that is less than 1.5V below VS+ will enable the amplifier. The amplifier will be disabled when the signal at EN pin is above VS+ - 0.5V.
FIGURE 32.
Choice of Feedback Resistor and Gain Bandwidth Product
For gains greater than 1, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value that should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few Pico farad range in parallel with RF can help to reduce the ringing and peaking at the expense of reducing the bandwidth. The bandwidth of the EL5178 and EL5378 depends on the load and the feedback network. RF and RG appear in parallel with the load for gains other than 1. As this combination gets smaller, the bandwidth falls off. Consequently, RF also has a minimum value that should not be exceeded for optimum bandwidth performance. For the gains other than 1, optimum response is obtained with RF between 500 to 1k. The EL5178 and EL5378 have a gain bandwidth product of 350MHz for RLD = 1k. For gains 5, its bandwidth can be predicted by the following equation:
Gain x BW = 300MHz
Output Drive Capability
The EL5178 and EL5378 have internal short circuit protection. Its typical short circuit current is 60mA. If the output is shorted indefinitely, the power dissipation could easily increase such that the part will be destroyed. Maximum reliability is maintained if the output current never exceeds 60mA. This limit is set by the design of the internal metal interconnections.
Power Dissipation
With the high output drive capability of the EL5178 and EL5378. It is possible to exceed the +135C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for the application to determine if the load conditions or package types need to be modified for the amplifier to remain in the safe operating area. The maximum power dissipation allowed in a package is determined according to:
T JMAX - T AMAX PD MAX = ------------------------------------------- JA
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FN7491.3 May 16, 2007
EL5178, EL5378
Where: TJMAX = Maximum junction temperature TAMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or:
V O PD = i x V S x I SMAX + V S x ----------- R LD
Power Supply Bypassing and Printed Circuit Board Layout
As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as sort as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS- pin is connected to the ground plane, a single 4.7F tantalum capacitor in parallel with a 0.1F ceramic capacitor from VS+ to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the VS- pin becomes the negative supply rail. For good AC performance, parasitic capacitance should be kept to minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces.
Where: VS = Total supply voltage ISMAX = Maximum quiescent supply current per channel VO = Maximum differential output voltage of the application RLD = Differential load resistance ILOAD = Load current i = Number of channels By setting the two PDMAX equations equal to each other, we can solve the output current and RLD to avoid the device overheat.
Typical Applications
RF
FBP IN+ RT RG INREF FBN RF EL5178/ EL5378
50
TWISTED PAIR IN+ EL5175/ EL5375
50 ZO = 100 INREF
VO
RFR RGR
FIGURE 33. TWISTED PAIR CABLE RECEIVER
As the signal is transmitted through a cable, the high frequency signal will be attenuated. One way to compensate this loss is to boost the high frequency gain at the receiver side.
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FN7491.3 May 16, 2007
EL5178, EL5378
RF
GAIN (dB)
FBP RT 75 IN+ RGC CL RG INREF FBN FREQUENCY RF fL fH VOVO+
2R F DC Gain = 1 + ---------RG 2R F ( HF )Gain = 1 + -------------------------R G || R GC
1 f L -----------------------2R G C C 1 f H ---------------------------2R GC C C
FIGURE 34. TRANSMIT EQUALIZER
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FN7491.3 May 16, 2007
EL5178, EL5378 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
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FN7491.3 May 16, 2007
EL5178, EL5378 Mini SO Package Family (MSOP)
0.25 M C A B D N A (N/2)+1
MDP0043
MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL A A1 MSOP8 1.10 0.10 0.86 0.33 0.18 3.00 4.90 3.00 0.65 0.55 0.95 8 MSOP10 1.10 0.10 0.86 0.23 0.18 3.00 4.90 3.00 0.50 0.55 0.95 10 TOLERANCE Max. 0.05 0.09 +0.07/-0.08 0.05 0.10 0.15 0.10 Basic 0.15 Basic Reference NOTES 1, 3 2, 3 Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included.
E
E1
PIN #1 I.D.
A2 b c
B
1 (N/2)
D E E1
e C SEATING PLANE 0.10 C N LEADS b
H
e L L1 N
0.08 M C A B
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
0.25
A1
3 3
17
FN7491.3 May 16, 2007
EL5178, EL5378 Quarter Size Outline Plastic Packages Family (QSOP)
A D N (N/2)+1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
PIN #1 I.D. MARK
A A1 A2 b
0.068 0.006 0.056 0.010 0.008 0.193 0.236 0.154 0.025 0.025 0.041 16
0.068 0.006 0.056 0.010 0.008 0.341 0.236 0.154 0.025 0.025 0.041 24
0.068 0.006 0.056 0.010 0.008 0.390 0.236 0.154 0.025 0.025 0.041 28
Max. 0.002 0.004 0.002 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference
1, 3 2, 3 Rev. F 2/07
E
E1
1 B 0.010 CAB
(N/2)
c D E
e C SEATING PLANE 0.004 C 0.007 CAB b
H
E1 e L L1 N
L1 A c SEE DETAIL "X"
NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010 A2 GAUGE PLANE L 44 DETAIL X
A1
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 18
FN7491.3 May 16, 2007

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